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Best usage of free-space capacitors in ASIC regulators
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Zeitschriftentitel: | Advances in Radio Science |
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Personen und Körperschaften: | , , |
In: | Advances in Radio Science, 11, 2013, S. 125-130 |
Format: | E-Article |
Sprache: | Englisch |
veröffentlicht: |
Copernicus GmbH
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Schlagwörter: |
author_facet |
Maier, T. Droste, D. Siegel, M. Maier, T. Droste, D. Siegel, M. |
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author |
Maier, T. Droste, D. Siegel, M. |
spellingShingle |
Maier, T. Droste, D. Siegel, M. Advances in Radio Science Best usage of free-space capacitors in ASIC regulators General Medicine |
author_sort |
maier, t. |
spelling |
Maier, T. Droste, D. Siegel, M. 1684-9973 Copernicus GmbH General Medicine http://dx.doi.org/10.5194/ars-11-125-2013 <jats:p>Abstract. In this work we examine how to improve the performance of voltage regulators in application specific integrated circuits (ASICs) by placing capacitors into free layout space. The problem arising after layout, when there are areas not covered by functional elements, is where to connect the free-space capacitors (FSCs), as they can be connected to the input or the output net of a voltage regulator. Therefore we designed a testbench for mathematical calculations and one for simulations to identify the influence of a capacitance connected at these certain positions. We mainly focused on PSR analysis while not losing sight of transient effects. The results of calculation and simulation illustrate that the best solution is to split the capacitance half by half to both possible nets if no output capacitance was installed during design. Otherwise a ratio of one to one for input capacitance to output capacitance has to be set up for best performance. </jats:p> Best usage of free-space capacitors in ASIC regulators Advances in Radio Science |
doi_str_mv |
10.5194/ars-11-125-2013 |
facet_avail |
Online Free |
format |
ElectronicArticle |
fullrecord |
blob:ai-49-aHR0cDovL2R4LmRvaS5vcmcvMTAuNTE5NC9hcnMtMTEtMTI1LTIwMTM |
id |
ai-49-aHR0cDovL2R4LmRvaS5vcmcvMTAuNTE5NC9hcnMtMTEtMTI1LTIwMTM |
institution |
DE-Zwi2 DE-D161 DE-Gla1 DE-Zi4 DE-15 DE-Pl11 DE-Rs1 DE-105 DE-14 DE-Ch1 DE-L229 DE-D275 DE-Bn3 DE-Brt1 |
imprint |
Copernicus GmbH, 2013 |
imprint_str_mv |
Copernicus GmbH, 2013 |
issn |
1684-9973 |
issn_str_mv |
1684-9973 |
language |
English |
mega_collection |
Copernicus GmbH (CrossRef) |
match_str |
maier2013bestusageoffreespacecapacitorsinasicregulators |
publishDateSort |
2013 |
publisher |
Copernicus GmbH |
recordtype |
ai |
record_format |
ai |
series |
Advances in Radio Science |
source_id |
49 |
title |
Best usage of free-space capacitors in ASIC regulators |
title_unstemmed |
Best usage of free-space capacitors in ASIC regulators |
title_full |
Best usage of free-space capacitors in ASIC regulators |
title_fullStr |
Best usage of free-space capacitors in ASIC regulators |
title_full_unstemmed |
Best usage of free-space capacitors in ASIC regulators |
title_short |
Best usage of free-space capacitors in ASIC regulators |
title_sort |
best usage of free-space capacitors in asic regulators |
topic |
General Medicine |
url |
http://dx.doi.org/10.5194/ars-11-125-2013 |
publishDate |
2013 |
physical |
125-130 |
description |
<jats:p>Abstract. In this work we examine how to improve the performance of voltage regulators in application specific integrated circuits (ASICs) by placing capacitors into free layout space. The problem arising after layout, when there are areas not covered by functional elements, is where to connect the free-space capacitors (FSCs), as they can be connected to the input or the output net of a voltage regulator. Therefore we designed a testbench for mathematical calculations and one for simulations to identify the influence of a capacitance connected at these certain positions. We mainly focused on PSR analysis while not losing sight of transient effects. The results of calculation and simulation illustrate that the best solution is to split the capacitance half by half to both possible nets if no output capacitance was installed during design. Otherwise a ratio of one to one for input capacitance to output capacitance has to be set up for best performance.
</jats:p> |
container_start_page |
125 |
container_title |
Advances in Radio Science |
container_volume |
11 |
format_de105 |
Article, E-Article |
format_de14 |
Article, E-Article |
format_de15 |
Article, E-Article |
format_de520 |
Article, E-Article |
format_de540 |
Article, E-Article |
format_dech1 |
Article, E-Article |
format_ded117 |
Article, E-Article |
format_degla1 |
E-Article |
format_del152 |
Buch |
format_del189 |
Article, E-Article |
format_dezi4 |
Article |
format_dezwi2 |
Article, E-Article |
format_finc |
Article, E-Article |
format_nrw |
Article, E-Article |
_version_ |
1792326053467783173 |
geogr_code |
not assigned |
last_indexed |
2024-03-01T12:15:06.281Z |
geogr_code_person |
not assigned |
openURL |
url_ver=Z39.88-2004&ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fvufind.svn.sourceforge.net%3Agenerator&rft.title=Best+usage+of+free-space+capacitors+in+ASIC+regulators&rft.date=2013-07-04&genre=article&issn=1684-9973&volume=11&spage=125&epage=130&pages=125-130&jtitle=Advances+in+Radio+Science&atitle=Best+usage+of+free-space+capacitors+in+ASIC+regulators&aulast=Siegel&aufirst=M.&rft_id=info%3Adoi%2F10.5194%2Fars-11-125-2013&rft.language%5B0%5D=eng |
SOLR | |
_version_ | 1792326053467783173 |
author | Maier, T., Droste, D., Siegel, M. |
author_facet | Maier, T., Droste, D., Siegel, M., Maier, T., Droste, D., Siegel, M. |
author_sort | maier, t. |
container_start_page | 125 |
container_title | Advances in Radio Science |
container_volume | 11 |
description | <jats:p>Abstract. In this work we examine how to improve the performance of voltage regulators in application specific integrated circuits (ASICs) by placing capacitors into free layout space. The problem arising after layout, when there are areas not covered by functional elements, is where to connect the free-space capacitors (FSCs), as they can be connected to the input or the output net of a voltage regulator. Therefore we designed a testbench for mathematical calculations and one for simulations to identify the influence of a capacitance connected at these certain positions. We mainly focused on PSR analysis while not losing sight of transient effects. The results of calculation and simulation illustrate that the best solution is to split the capacitance half by half to both possible nets if no output capacitance was installed during design. Otherwise a ratio of one to one for input capacitance to output capacitance has to be set up for best performance. </jats:p> |
doi_str_mv | 10.5194/ars-11-125-2013 |
facet_avail | Online, Free |
format | ElectronicArticle |
format_de105 | Article, E-Article |
format_de14 | Article, E-Article |
format_de15 | Article, E-Article |
format_de520 | Article, E-Article |
format_de540 | Article, E-Article |
format_dech1 | Article, E-Article |
format_ded117 | Article, E-Article |
format_degla1 | E-Article |
format_del152 | Buch |
format_del189 | Article, E-Article |
format_dezi4 | Article |
format_dezwi2 | Article, E-Article |
format_finc | Article, E-Article |
format_nrw | Article, E-Article |
geogr_code | not assigned |
geogr_code_person | not assigned |
id | ai-49-aHR0cDovL2R4LmRvaS5vcmcvMTAuNTE5NC9hcnMtMTEtMTI1LTIwMTM |
imprint | Copernicus GmbH, 2013 |
imprint_str_mv | Copernicus GmbH, 2013 |
institution | DE-Zwi2, DE-D161, DE-Gla1, DE-Zi4, DE-15, DE-Pl11, DE-Rs1, DE-105, DE-14, DE-Ch1, DE-L229, DE-D275, DE-Bn3, DE-Brt1 |
issn | 1684-9973 |
issn_str_mv | 1684-9973 |
language | English |
last_indexed | 2024-03-01T12:15:06.281Z |
match_str | maier2013bestusageoffreespacecapacitorsinasicregulators |
mega_collection | Copernicus GmbH (CrossRef) |
physical | 125-130 |
publishDate | 2013 |
publishDateSort | 2013 |
publisher | Copernicus GmbH |
record_format | ai |
recordtype | ai |
series | Advances in Radio Science |
source_id | 49 |
spelling | Maier, T. Droste, D. Siegel, M. 1684-9973 Copernicus GmbH General Medicine http://dx.doi.org/10.5194/ars-11-125-2013 <jats:p>Abstract. In this work we examine how to improve the performance of voltage regulators in application specific integrated circuits (ASICs) by placing capacitors into free layout space. The problem arising after layout, when there are areas not covered by functional elements, is where to connect the free-space capacitors (FSCs), as they can be connected to the input or the output net of a voltage regulator. Therefore we designed a testbench for mathematical calculations and one for simulations to identify the influence of a capacitance connected at these certain positions. We mainly focused on PSR analysis while not losing sight of transient effects. The results of calculation and simulation illustrate that the best solution is to split the capacitance half by half to both possible nets if no output capacitance was installed during design. Otherwise a ratio of one to one for input capacitance to output capacitance has to be set up for best performance. </jats:p> Best usage of free-space capacitors in ASIC regulators Advances in Radio Science |
spellingShingle | Maier, T., Droste, D., Siegel, M., Advances in Radio Science, Best usage of free-space capacitors in ASIC regulators, General Medicine |
title | Best usage of free-space capacitors in ASIC regulators |
title_full | Best usage of free-space capacitors in ASIC regulators |
title_fullStr | Best usage of free-space capacitors in ASIC regulators |
title_full_unstemmed | Best usage of free-space capacitors in ASIC regulators |
title_short | Best usage of free-space capacitors in ASIC regulators |
title_sort | best usage of free-space capacitors in asic regulators |
title_unstemmed | Best usage of free-space capacitors in ASIC regulators |
topic | General Medicine |
url | http://dx.doi.org/10.5194/ars-11-125-2013 |