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Placement of 3D ICs with Thermal and Interlayer Via Considerations
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| Zeitschriftentitel: | 2007 44th ACM/IEEE Design Automation Conference |
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| In: | 2007 44th ACM/IEEE Design Automation Conference, 2007 |
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IEEE
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Goplen, Brent Sapatnekar, Sachin Goplen, Brent Sapatnekar, Sachin |
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Goplen, Brent Sapatnekar, Sachin |
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Goplen, Brent Sapatnekar, Sachin 2007 44th ACM/IEEE Design Automation Conference Placement of 3D ICs with Thermal and Interlayer Via Considerations |
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Goplen, Brent Sapatnekar, Sachin 0738-100X IEEE http://dx.doi.org/10.1109/dac.2007.375239 Placement of 3D ICs with Thermal and Interlayer Via Considerations 2007 44th ACM/IEEE Design Automation Conference |
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Placement of 3D ICs with Thermal and Interlayer Via Considerations |
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Placement of 3D ICs with Thermal and Interlayer Via Considerations |
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Placement of 3D ICs with Thermal and Interlayer Via Considerations |
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Placement of 3D ICs with Thermal and Interlayer Via Considerations |
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Placement of 3D ICs with Thermal and Interlayer Via Considerations |
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Placement of 3D ICs with Thermal and Interlayer Via Considerations |
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placement of 3d ics with thermal and interlayer via considerations |
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| spelling | Goplen, Brent Sapatnekar, Sachin 0738-100X IEEE http://dx.doi.org/10.1109/dac.2007.375239 Placement of 3D ICs with Thermal and Interlayer Via Considerations 2007 44th ACM/IEEE Design Automation Conference |
| spellingShingle | Goplen, Brent, Sapatnekar, Sachin, 2007 44th ACM/IEEE Design Automation Conference, Placement of 3D ICs with Thermal and Interlayer Via Considerations |
| title | Placement of 3D ICs with Thermal and Interlayer Via Considerations |
| title_full | Placement of 3D ICs with Thermal and Interlayer Via Considerations |
| title_fullStr | Placement of 3D ICs with Thermal and Interlayer Via Considerations |
| title_full_unstemmed | Placement of 3D ICs with Thermal and Interlayer Via Considerations |
| title_short | Placement of 3D ICs with Thermal and Interlayer Via Considerations |
| title_sort | placement of 3d ics with thermal and interlayer via considerations |
| title_unstemmed | Placement of 3D ICs with Thermal and Interlayer Via Considerations |
| url | http://dx.doi.org/10.1109/dac.2007.375239 |