author_facet PARK, S.-H.
PARK, S.-H.
author PARK, S.-H.
spellingShingle PARK, S.-H.
IEICE Transactions on Information and Systems
Speculative Branch Folding for Pipelined Processors
Artificial Intelligence
Electrical and Electronic Engineering
Computer Vision and Pattern Recognition
Hardware and Architecture
Software
author_sort park, s.-h.
spelling PARK, S.-H. 0916-8532 1745-1361 Institute of Electronics, Information and Communications Engineers (IEICE) Artificial Intelligence Electrical and Electronic Engineering Computer Vision and Pattern Recognition Hardware and Architecture Software http://dx.doi.org/10.1093/ietisy/e88-d.5.1064 Speculative Branch Folding for Pipelined Processors IEICE Transactions on Information and Systems
doi_str_mv 10.1093/ietisy/e88-d.5.1064
facet_avail Online
finc_class_facet Informatik
Technik
Mathematik
Physik
format ElectronicArticle
fullrecord blob:ai-49-aHR0cDovL2R4LmRvaS5vcmcvMTAuMTA5My9pZXRpc3kvZTg4LWQuNS4xMDY0
id ai-49-aHR0cDovL2R4LmRvaS5vcmcvMTAuMTA5My9pZXRpc3kvZTg4LWQuNS4xMDY0
institution DE-Gla1
DE-Zi4
DE-15
DE-Pl11
DE-Rs1
DE-105
DE-14
DE-Ch1
DE-L229
DE-D275
DE-Bn3
DE-Brt1
DE-D161
imprint Institute of Electronics, Information and Communications Engineers (IEICE), 2005
imprint_str_mv Institute of Electronics, Information and Communications Engineers (IEICE), 2005
issn 1745-1361
0916-8532
issn_str_mv 1745-1361
0916-8532
language English
mega_collection Institute of Electronics, Information and Communications Engineers (IEICE) (CrossRef)
match_str park2005speculativebranchfoldingforpipelinedprocessors
publishDateSort 2005
publisher Institute of Electronics, Information and Communications Engineers (IEICE)
recordtype ai
record_format ai
series IEICE Transactions on Information and Systems
source_id 49
title Speculative Branch Folding for Pipelined Processors
title_unstemmed Speculative Branch Folding for Pipelined Processors
title_full Speculative Branch Folding for Pipelined Processors
title_fullStr Speculative Branch Folding for Pipelined Processors
title_full_unstemmed Speculative Branch Folding for Pipelined Processors
title_short Speculative Branch Folding for Pipelined Processors
title_sort speculative branch folding for pipelined processors
topic Artificial Intelligence
Electrical and Electronic Engineering
Computer Vision and Pattern Recognition
Hardware and Architecture
Software
url http://dx.doi.org/10.1093/ietisy/e88-d.5.1064
publishDate 2005
physical 1064-1066
description
container_issue 5
container_start_page 1064
container_title IEICE Transactions on Information and Systems
container_volume E88-D
format_de105 Article, E-Article
format_de14 Article, E-Article
format_de15 Article, E-Article
format_de520 Article, E-Article
format_de540 Article, E-Article
format_dech1 Article, E-Article
format_ded117 Article, E-Article
format_degla1 E-Article
format_del152 Buch
format_del189 Article, E-Article
format_dezi4 Article
format_dezwi2 Article, E-Article
format_finc Article, E-Article
format_nrw Article, E-Article
_version_ 1792333883047411722
geogr_code not assigned
last_indexed 2024-03-01T14:19:50.188Z
geogr_code_person not assigned
openURL url_ver=Z39.88-2004&ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fvufind.svn.sourceforge.net%3Agenerator&rft.title=Speculative+Branch+Folding+for+Pipelined+Processors&rft.date=2005-05-01&genre=article&issn=1745-1361&volume=E88-D&issue=5&spage=1064&epage=1066&pages=1064-1066&jtitle=IEICE+Transactions+on+Information+and+Systems&atitle=Speculative+Branch+Folding+for+Pipelined+Processors&aulast=PARK&aufirst=S.-H.&rft_id=info%3Adoi%2F10.1093%2Fietisy%2Fe88-d.5.1064&rft.language%5B0%5D=eng
SOLR
_version_ 1792333883047411722
author PARK, S.-H.
author_facet PARK, S.-H., PARK, S.-H.
author_sort park, s.-h.
container_issue 5
container_start_page 1064
container_title IEICE Transactions on Information and Systems
container_volume E88-D
description
doi_str_mv 10.1093/ietisy/e88-d.5.1064
facet_avail Online
finc_class_facet Informatik, Technik, Mathematik, Physik
format ElectronicArticle
format_de105 Article, E-Article
format_de14 Article, E-Article
format_de15 Article, E-Article
format_de520 Article, E-Article
format_de540 Article, E-Article
format_dech1 Article, E-Article
format_ded117 Article, E-Article
format_degla1 E-Article
format_del152 Buch
format_del189 Article, E-Article
format_dezi4 Article
format_dezwi2 Article, E-Article
format_finc Article, E-Article
format_nrw Article, E-Article
geogr_code not assigned
geogr_code_person not assigned
id ai-49-aHR0cDovL2R4LmRvaS5vcmcvMTAuMTA5My9pZXRpc3kvZTg4LWQuNS4xMDY0
imprint Institute of Electronics, Information and Communications Engineers (IEICE), 2005
imprint_str_mv Institute of Electronics, Information and Communications Engineers (IEICE), 2005
institution DE-Gla1, DE-Zi4, DE-15, DE-Pl11, DE-Rs1, DE-105, DE-14, DE-Ch1, DE-L229, DE-D275, DE-Bn3, DE-Brt1, DE-D161
issn 1745-1361, 0916-8532
issn_str_mv 1745-1361, 0916-8532
language English
last_indexed 2024-03-01T14:19:50.188Z
match_str park2005speculativebranchfoldingforpipelinedprocessors
mega_collection Institute of Electronics, Information and Communications Engineers (IEICE) (CrossRef)
physical 1064-1066
publishDate 2005
publishDateSort 2005
publisher Institute of Electronics, Information and Communications Engineers (IEICE)
record_format ai
recordtype ai
series IEICE Transactions on Information and Systems
source_id 49
spelling PARK, S.-H. 0916-8532 1745-1361 Institute of Electronics, Information and Communications Engineers (IEICE) Artificial Intelligence Electrical and Electronic Engineering Computer Vision and Pattern Recognition Hardware and Architecture Software http://dx.doi.org/10.1093/ietisy/e88-d.5.1064 Speculative Branch Folding for Pipelined Processors IEICE Transactions on Information and Systems
spellingShingle PARK, S.-H., IEICE Transactions on Information and Systems, Speculative Branch Folding for Pipelined Processors, Artificial Intelligence, Electrical and Electronic Engineering, Computer Vision and Pattern Recognition, Hardware and Architecture, Software
title Speculative Branch Folding for Pipelined Processors
title_full Speculative Branch Folding for Pipelined Processors
title_fullStr Speculative Branch Folding for Pipelined Processors
title_full_unstemmed Speculative Branch Folding for Pipelined Processors
title_short Speculative Branch Folding for Pipelined Processors
title_sort speculative branch folding for pipelined processors
title_unstemmed Speculative Branch Folding for Pipelined Processors
topic Artificial Intelligence, Electrical and Electronic Engineering, Computer Vision and Pattern Recognition, Hardware and Architecture, Software
url http://dx.doi.org/10.1093/ietisy/e88-d.5.1064