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𝒟ℰℱect 𝒯olerant layout synthesis
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| Zeitschriftentitel: | International Journal of Electronics |
|---|---|
| Personen und Körperschaften: | , |
| In: | International Journal of Electronics, 76, 1994, 6, S. 1121-1133 |
| Format: | E-Article |
| Sprache: | Englisch |
| veröffentlicht: |
Informa UK Limited
|
| Schlagwörter: |
| author_facet |
ORAILOGˇLU, ALEX KARRI, RAMESH ORAILOGˇLU, ALEX KARRI, RAMESH |
|---|---|
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ORAILOGˇLU, ALEX KARRI, RAMESH |
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ORAILOGˇLU, ALEX KARRI, RAMESH International Journal of Electronics 𝒟ℰℱect 𝒯olerant layout synthesis Electrical and Electronic Engineering |
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orailogˇlu, alex |
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ORAILOGˇLU, ALEX KARRI, RAMESH 0020-7217 1362-3060 Informa UK Limited Electrical and Electronic Engineering http://dx.doi.org/10.1080/00207219408926022 𝒟ℰℱect 𝒯olerant layout synthesis International Journal of Electronics |
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Informa UK Limited, 1994 |
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Informa UK Limited, 1994 |
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0020-7217 1362-3060 |
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0020-7217 1362-3060 |
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International Journal of Electronics |
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49 |
| title |
𝒟ℰℱect 𝒯olerant layout synthesis |
| title_unstemmed |
𝒟ℰℱect 𝒯olerant layout synthesis |
| title_full |
𝒟ℰℱect 𝒯olerant layout synthesis |
| title_fullStr |
𝒟ℰℱect 𝒯olerant layout synthesis |
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𝒟ℰℱect 𝒯olerant layout synthesis |
| title_short |
𝒟ℰℱect 𝒯olerant layout synthesis |
| title_sort |
𝒟ℰℱect 𝒯olerant layout synthesis |
| topic |
Electrical and Electronic Engineering |
| url |
http://dx.doi.org/10.1080/00207219408926022 |
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1994 |
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1121-1133 |
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| imprint_str_mv | Informa UK Limited, 1994 |
| institution | DE-D275, DE-Bn3, DE-Brt1, DE-D161, DE-Gla1, DE-Zi4, DE-15, DE-Pl11, DE-Rs1, DE-105, DE-14, DE-Ch1, DE-L229 |
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| physical | 1121-1133 |
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| series | International Journal of Electronics |
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| spelling | ORAILOGˇLU, ALEX KARRI, RAMESH 0020-7217 1362-3060 Informa UK Limited Electrical and Electronic Engineering http://dx.doi.org/10.1080/00207219408926022 𝒟ℰℱect 𝒯olerant layout synthesis International Journal of Electronics |
| spellingShingle | ORAILOGˇLU, ALEX, KARRI, RAMESH, International Journal of Electronics, 𝒟ℰℱect 𝒯olerant layout synthesis, Electrical and Electronic Engineering |
| title | 𝒟ℰℱect 𝒯olerant layout synthesis |
| title_full | 𝒟ℰℱect 𝒯olerant layout synthesis |
| title_fullStr | 𝒟ℰℱect 𝒯olerant layout synthesis |
| title_full_unstemmed | 𝒟ℰℱect 𝒯olerant layout synthesis |
| title_short | 𝒟ℰℱect 𝒯olerant layout synthesis |
| title_sort | 𝒟ℰℱect 𝒯olerant layout synthesis |
| title_unstemmed | 𝒟ℰℱect 𝒯olerant layout synthesis |
| topic | Electrical and Electronic Engineering |
| url | http://dx.doi.org/10.1080/00207219408926022 |