|
|
|
|
LEADER |
07235cam a22016212 4500 |
001 |
0-1651541140 |
003 |
DE-627 |
005 |
20240122105052.0 |
007 |
cr uuu---uuuuu |
008 |
120704s2012 gw |||||o 00| ||eng c |
020 |
|
|
|a 9783642314940
|9 978-3-642-31494-0
|
024 |
7 |
|
|a 10.1007/978-3-642-31494-0
|2 doi
|
035 |
|
|
|a (DE-627)1651541140
|
035 |
|
|
|a (DE-576)367688328
|
035 |
|
|
|a (DE-599)BSZ367688328
|
035 |
|
|
|a (OCoLC)840011086
|
035 |
|
|
|a (OCoLC)802217898
|
035 |
|
|
|a (ZBM)1248.94011
|
035 |
|
|
|a (ZBM)1248.94011
|
035 |
|
|
|a (DE-He213)978-3-642-31494-0
|
035 |
|
|
|a (EBP)040543161
|
040 |
|
|
|a DE-627
|b ger
|c DE-627
|e rakwb
|
041 |
|
|
|a eng
|
044 |
|
|
|c XA-DE
|c XA-DE-BE
|
050 |
|
0 |
|a QA76.9.L63
|
072 |
|
7 |
|a UYF
|2 bicssc
|
072 |
|
7 |
|a COM036000
|2 bisacsh
|
084 |
|
|
|a SS 4800
|q SEPA
|2 rvk
|0 (DE-625)rvk/143528:
|
084 |
|
|
|a *94-06
|2 msc
|
084 |
|
|
|a 68-06
|2 msc
|
084 |
|
|
|a 68W35
|2 msc
|
084 |
|
|
|a 94C10
|2 msc
|
084 |
|
|
|a 94C12
|2 msc
|
084 |
|
|
|a 00B25
|2 msc
|
084 |
|
|
|a 53.55
|2 bkl
|
084 |
|
|
|a 53.52
|2 bkl
|
100 |
1 |
|
|a Rahaman, Hafizur
|0 (DE-588)1025796624
|0 (DE-627)724137548
|0 (DE-576)370787234
|4 aut
|
245 |
1 |
0 |
|a Progress in VLSI Design and Test
|b 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings
|c edited by Hafizur Rahaman, Sanatan Chattopadhyay, Santanu Chattopadhyay
|
264 |
|
1 |
|a Berlin, Heidelberg
|b Springer Berlin Heidelberg
|c 2012
|
300 |
|
|
|a Online-Ressource (XXIV, 408 p. 275 illus, digital)
|
336 |
|
|
|a Text
|b txt
|2 rdacontent
|
337 |
|
|
|a Computermedien
|b c
|2 rdamedia
|
338 |
|
|
|a Online-Ressource
|b cr
|2 rdacarrier
|
490 |
1 |
|
|a Lecture Notes in Computer Science
|v 7373
|
490 |
0 |
|
|a SpringerLink
|a Bücher
|
500 |
|
|
|a Literaturangaben
|
520 |
|
|
|a This book constitutes the refereed proceedings of the 16th International Symposium on VSLI Design and Test, VDAT 2012, held in Shibpur, India, in July 2012. The 30 revised regular papers presented together with 10 short papers and 13 poster sessions were carefully selected from 135 submissions. The papers are organized in topical sections on VLSI design, design and modeling of digital circuits and systems, testing and verification, design for testability, testing memories and regular logic arrays, embedded systems: hardware/software co-design and verification, emerging technology: nanoscale computing and nanotechnology.
|
650 |
|
0 |
|a Computer science
|
650 |
|
0 |
|a Computer Communication Networks
|
650 |
|
0 |
|a Computer software
|
650 |
|
0 |
|a Computer Science
|
650 |
|
0 |
|a Computer science
|
650 |
|
0 |
|a Logic design
|
650 |
|
0 |
|a Computer Communication Networks
|
650 |
|
0 |
|a Software engineering
|
650 |
|
0 |
|a Data structures (Computer science)
|
650 |
|
0 |
|a Computer software
|
650 |
|
0 |
|a Logic design
|
650 |
|
0 |
|a Software engineering
|
650 |
|
0 |
|a Data structures (Computer science)
|
650 |
|
0 |
|a Computer networks .
|
650 |
|
0 |
|a Information theory.
|
650 |
|
0 |
|a Algorithms.
|
650 |
|
0 |
|a Computer programming.
|
655 |
|
7 |
|a Konferenzschrift
|y 2012
|z Hāora
|0 (DE-588)1071861417
|0 (DE-627)826484824
|0 (DE-576)433375485
|2 gnd-content
|
655 |
|
7 |
|a Konferenzschrift
|0 (DE-588)1071861417
|0 (DE-627)826484824
|0 (DE-576)433375485
|2 gnd-content
|
689 |
0 |
0 |
|D s
|0 (DE-588)4117388-0
|0 (DE-627)104653582
|0 (DE-576)20950949X
|a VLSI
|2 gnd
|
689 |
0 |
1 |
|D s
|0 (DE-588)4312536-0
|0 (DE-627)124346359
|0 (DE-576)211146684
|a Entwurfsautomation
|2 gnd
|
689 |
0 |
2 |
|D s
|0 (DE-588)4740357-3
|0 (DE-627)366978756
|0 (DE-576)215926528
|a System-on-Chip
|2 gnd
|
689 |
0 |
3 |
|D s
|0 (DE-588)4347749-5
|0 (DE-627)156895641
|0 (DE-576)211488518
|a Field programmable gate array
|2 gnd
|
689 |
0 |
4 |
|D s
|0 (DE-588)4367264-4
|0 (DE-627)181761459
|0 (DE-576)211692794
|a Testen
|2 gnd
|
689 |
0 |
5 |
|D s
|0 (DE-588)4135577-5
|0 (DE-627)104649100
|0 (DE-576)209661933
|a Verifikation
|2 gnd
|
689 |
0 |
|
|5 DE-101
|
700 |
1 |
|
|a Chattopadhyay, Sanatan
|4 oth
|
700 |
1 |
|
|a Chattopadhyay, Santanu
|4 oth
|
776 |
1 |
|
|z 9783642314933
|
776 |
0 |
8 |
|i Buchausg. u.d.T.
|t Progress in VLSI design and test
|d Berlin : Springer, 2012
|h XII, 482 S.
|w (DE-627)1602015414
|w (DE-576)379598361
|z 9783642314933
|z 3642314937
|
830 |
|
0 |
|a Lecture notes in computer science
|v 7373
|9 7373
|w (DE-627)316228877
|w (DE-576)093890923
|w (DE-600)2018930-8
|x 1611-3349
|7 ns
|
856 |
4 |
0 |
|u https://doi.org/10.1007/978-3-642-31494-0
|m X:SPRINGER
|x Verlag
|z lizenzpflichtig
|3 Volltext
|
856 |
4 |
0 |
|u http://dx.doi.org/10.1007/978-3-642-31494-0
|x Resolving-System
|z lizenzpflichtig
|3 Volltext
|
856 |
4 |
2 |
|u https://swbplus.bsz-bw.de/bsz367688328cov.jpg
|m V:DE-576
|m X:springer
|q image/jpeg
|v 20130405112840
|3 Cover
|
856 |
4 |
2 |
|u https://zbmath.org/?q=an:1248.94011
|m B:ZBM
|v 2021-04-12
|x Verlag
|y Zentralblatt MATH
|3 Inhaltstext
|
889 |
|
|
|w (DE-627)718778197
|
912 |
|
|
|a ZDB-2-LNC
|b 2012
|
912 |
|
|
|a ZDB-2-SCS
|b 2012
|
912 |
|
|
|a ZDB-2-SEB
|
912 |
|
|
|a ZDB-2-SXCS
|b 2012
|
912 |
|
|
|a ZDB-2-SEB
|b 2012
|
935 |
|
|
|h GBV
|i ExPruef
|
936 |
r |
v |
|a SS 4800
|b Lecture notes in computer science
|k Informatik
|k Enzyklopädien und Handbücher. Kongressberichte Schriftenreihe. Tafeln und Formelsammlungen
|k Schriftenreihen (indiv. Sign.)
|k Lecture notes in computer science
|0 (DE-627)1271461242
|0 (DE-625)rvk/143528:
|0 (DE-576)201461242
|
936 |
b |
k |
|a 53.55
|j Mikroelektronik
|q SEPA
|0 (DE-627)10641853X
|
936 |
b |
k |
|a 53.52
|j Elektronische Schaltungen
|q SEPA
|0 (DE-627)106414070
|
951 |
|
|
|a BO
|
950 |
|
|
|a Verifizierung
|
950 |
|
|
|a Verifizierbarkeit
|
950 |
|
|
|a Logik
|
950 |
|
|
|a Erkenntnis
|
950 |
|
|
|a Wahrheit
|
950 |
|
|
|a Верификация
|
950 |
|
|
|a Grösstintegration
|
950 |
|
|
|a Grösstintegrierte Schaltung
|
950 |
|
|
|a Höchstintegration
|
950 |
|
|
|a Höchstintegrierte Schaltung
|
950 |
|
|
|a Very large scale integration
|
950 |
|
|
|a VLSI-Schaltung
|
950 |
|
|
|a Integrierte Schaltung
|
950 |
|
|
|a Integration
|
950 |
|
|
|a LSI
|
950 |
|
|
|a Design automation
|
950 |
|
|
|a DA
|
950 |
|
|
|a Schaltungsentwurf
|
950 |
|
|
|a CAD
|
950 |
|
|
|a Electronic design automation
|
950 |
|
|
|a EDA
|
950 |
|
|
|a Rechnerunterstützter Schaltungsentwurf
|
950 |
|
|
|a Electronic CAD
|
950 |
|
|
|a ECAD
|
950 |
|
|
|a FPGA
|
950 |
|
|
|a Feldprogrammierbare Gate-Array-Schaltung
|
950 |
|
|
|a Programmierbare logische Anordnung
|
950 |
|
|
|a Gate-Array-Bauelement
|
950 |
|
|
|a Тестирование
|
950 |
|
|
|a SoC
|
950 |
|
|
|a System on a Chip
|
950 |
|
|
|a Ein-Chip-System
|
951 |
|
|
|b XB-IN
|
856 |
4 |
0 |
|u http://dx.doi.org/10.1007/978-3-642-31494-0
|9 DE-14
|
852 |
|
|
|a DE-14
|x epn:3350038247
|z 2012-07-04T16:23:46Z
|
856 |
4 |
0 |
|u http://dx.doi.org/10.1007/978-3-642-31494-0
|9 DE-15
|
852 |
|
|
|a DE-15
|x epn:335003828X
|z 2012-07-04T16:23:46Z
|
856 |
4 |
0 |
|u http://dx.doi.org/10.1007/978-3-642-31494-0
|9 DE-Ch1
|
852 |
|
|
|a DE-Ch1
|x epn:3350038344
|z 2012-07-04T16:23:46Z
|
976 |
|
|
|h Elektronischer Volltext - Campuslizenz
|
856 |
4 |
0 |
|u http://dx.doi.org/10.1007/978-3-642-31494-0
|z Zum Online-Dokument
|9 DE-Zi4
|
852 |
|
|
|a DE-Zi4
|x epn:3350038425
|z 2012-07-04T16:23:46Z
|
856 |
4 |
0 |
|u http://dx.doi.org/10.1007/978-3-642-31494-0
|9 DE-520
|
852 |
|
|
|a DE-520
|x epn:3350038492
|z 2012-07-04T16:23:46Z
|
980 |
|
|
|a 1651541140
|b 0
|k 1651541140
|o 367688328
|
SOLR
_version_ |
1792253792775831552 |
access_facet |
Electronic Resources |
author |
Rahaman, Hafizur |
author2 |
Chattopadhyay, Sanatan, Chattopadhyay, Santanu |
author2_role |
oth, oth |
author2_variant |
s c sc, s c sc |
author_facet |
Rahaman, Hafizur, Chattopadhyay, Sanatan, Chattopadhyay, Santanu |
author_role |
aut |
author_sort |
Rahaman, Hafizur |
author_variant |
h r hr |
callnumber-first |
Q - Science |
callnumber-label |
QA76 |
callnumber-raw |
QA76.9.L63 |
callnumber-search |
QA76.9.L63 |
callnumber-sort |
QA 276.9 L63 |
callnumber-subject |
QA - Mathematics |
collection |
ZDB-2-LNC, ZDB-2-SCS, ZDB-2-SEB, ZDB-2-SXCS |
contents |
This book constitutes the refereed proceedings of the 16th International Symposium on VSLI Design and Test, VDAT 2012, held in Shibpur, India, in July 2012. The 30 revised regular papers presented together with 10 short papers and 13 poster sessions were carefully selected from 135 submissions. The papers are organized in topical sections on VLSI design, design and modeling of digital circuits and systems, testing and verification, design for testability, testing memories and regular logic arrays, embedded systems: hardware/software co-design and verification, emerging technology: nanoscale computing and nanotechnology. |
ctrlnum |
(DE-627)1651541140, (DE-576)367688328, (DE-599)BSZ367688328, (OCoLC)840011086, (OCoLC)802217898, (ZBM)1248.94011, (DE-He213)978-3-642-31494-0, (EBP)040543161 |
de15_date |
2012-07-04T16:23:46Z |
dech1_date |
2012-07-04T16:23:46Z |
doi_str_mv |
10.1007/978-3-642-31494-0 |
era_facet |
2012 |
facet_912a |
ZDB-2-LNC, ZDB-2-SCS, ZDB-2-SEB, ZDB-2-SXCS |
facet_avail |
Online |
facet_local_del330 |
VLSI, Entwurfsautomation, System-on-Chip, Field programmable gate array, Testen, Verifikation |
finc_class_facet |
Informatik, Mathematik |
fincclass_txtF_mv |
science-computerscience, engineering-electrical |
footnote |
Literaturangaben |
format |
eBook, ConferenceProceedings |
format_access_txtF_mv |
Book, E-Book |
format_de105 |
Ebook |
format_de14 |
Book, E-Book |
format_de15 |
Book, E-Book |
format_del152 |
Buch |
format_detail_txtF_mv |
text-online-monograph-independent |
format_dezi4 |
e-Book |
format_finc |
Book, E-Book |
format_legacy |
ElectronicBook |
format_legacy_nrw |
Book, E-Book |
format_nrw |
Book, E-Book |
format_strict_txtF_mv |
E-Book |
genre |
Konferenzschrift 2012 Hāora (DE-588)1071861417 (DE-627)826484824 (DE-576)433375485 gnd-content, Konferenzschrift (DE-588)1071861417 (DE-627)826484824 (DE-576)433375485 gnd-content |
genre_facet |
Konferenzschrift |
geogr_code |
not assigned |
geogr_code_person |
India |
geographic_facet |
Hāora |
hierarchy_parent_id |
0-316228877 |
hierarchy_parent_title |
Lecture notes in computer science |
hierarchy_sequence |
7373 |
hierarchy_top_id |
0-316228877 |
hierarchy_top_title |
Lecture notes in computer science |
id |
0-1651541140 |
illustrated |
Not Illustrated |
imprint |
Berlin, Heidelberg, Springer Berlin Heidelberg, 2012 |
imprint_str_mv |
Berlin, Heidelberg: Springer Berlin Heidelberg, 2012 |
institution |
DE-14, DE-Zi4, DE-Ch1, DE-520, DE-15 |
is_hierarchy_id |
0-1651541140 |
is_hierarchy_title |
Progress in VLSI Design and Test: 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings |
isbn |
9783642314940 |
isbn_isn_mv |
9783642314933, 3642314937 |
issn_isn_mv |
1611-3349 |
kxp_id_str |
1651541140 |
language |
English |
last_indexed |
2024-02-29T17:06:48.005Z |
local_heading_facet_dezwi2 |
Computer science, Computer Communication Networks, Computer software, Computer Science, Logic design, Software engineering, Data structures (Computer science), Computer networks ., Information theory., Algorithms., Computer programming., VLSI, Entwurfsautomation, System-on-Chip, Field programmable gate array, Testen, Verifikation |
marc024a_ct_mv |
10.1007/978-3-642-31494-0 |
match_str |
rahaman2012progressinvlsidesignandtest16thinternationalsymposiumvdat2012shibpurindiajuly142012proceedings |
mega_collection |
Verbunddaten SWB |
multipart_link |
093890923 |
multipart_part |
(093890923)7373 |
names_id_str_mv |
(DE-588)1025796624, (DE-627)724137548, (DE-576)370787234 |
oclc_num |
840011086, 802217898 |
physical |
Online-Ressource (XXIV, 408 p. 275 illus, digital) |
publishDate |
2012 |
publishDateSort |
2012 |
publishPlace |
Berlin, Heidelberg |
publisher |
Springer Berlin Heidelberg |
record_format |
marcfinc |
record_id |
367688328 |
recordtype |
marcfinc |
rsn_id_str_mv |
(DE-15)3140199 |
rvk_facet |
SS 4800 |
rvk_label |
Informatik, Enzyklopädien und Handbücher. Kongressberichte Schriftenreihe. Tafeln und Formelsammlungen, Schriftenreihen (indiv. Sign.), Lecture notes in computer science |
rvk_path |
SS, SQ - SU, SS 4000 - SS 5999, SS 4800 |
rvk_path_str_mv |
SS, SQ - SU, SS 4000 - SS 5999, SS 4800 |
series |
Lecture notes in computer science, 7373 |
series2 |
Lecture Notes in Computer Science ; 7373, SpringerLink ; Bücher |
source_id |
0 |
spelling |
Rahaman, Hafizur (DE-588)1025796624 (DE-627)724137548 (DE-576)370787234 aut, Progress in VLSI Design and Test 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings edited by Hafizur Rahaman, Sanatan Chattopadhyay, Santanu Chattopadhyay, Berlin, Heidelberg Springer Berlin Heidelberg 2012, Online-Ressource (XXIV, 408 p. 275 illus, digital), Text txt rdacontent, Computermedien c rdamedia, Online-Ressource cr rdacarrier, Lecture Notes in Computer Science 7373, SpringerLink Bücher, Literaturangaben, This book constitutes the refereed proceedings of the 16th International Symposium on VSLI Design and Test, VDAT 2012, held in Shibpur, India, in July 2012. The 30 revised regular papers presented together with 10 short papers and 13 poster sessions were carefully selected from 135 submissions. The papers are organized in topical sections on VLSI design, design and modeling of digital circuits and systems, testing and verification, design for testability, testing memories and regular logic arrays, embedded systems: hardware/software co-design and verification, emerging technology: nanoscale computing and nanotechnology., Computer science, Computer Communication Networks, Computer software, Computer Science, Logic design, Software engineering, Data structures (Computer science), Computer networks ., Information theory., Algorithms., Computer programming., Konferenzschrift 2012 Hāora (DE-588)1071861417 (DE-627)826484824 (DE-576)433375485 gnd-content, Konferenzschrift (DE-588)1071861417 (DE-627)826484824 (DE-576)433375485 gnd-content, s (DE-588)4117388-0 (DE-627)104653582 (DE-576)20950949X VLSI gnd, s (DE-588)4312536-0 (DE-627)124346359 (DE-576)211146684 Entwurfsautomation gnd, s (DE-588)4740357-3 (DE-627)366978756 (DE-576)215926528 System-on-Chip gnd, s (DE-588)4347749-5 (DE-627)156895641 (DE-576)211488518 Field programmable gate array gnd, s (DE-588)4367264-4 (DE-627)181761459 (DE-576)211692794 Testen gnd, s (DE-588)4135577-5 (DE-627)104649100 (DE-576)209661933 Verifikation gnd, DE-101, Chattopadhyay, Sanatan oth, Chattopadhyay, Santanu oth, 9783642314933, Buchausg. u.d.T. Progress in VLSI design and test Berlin : Springer, 2012 XII, 482 S. (DE-627)1602015414 (DE-576)379598361 9783642314933 3642314937, Lecture notes in computer science 7373 7373 (DE-627)316228877 (DE-576)093890923 (DE-600)2018930-8 1611-3349 ns, https://doi.org/10.1007/978-3-642-31494-0 X:SPRINGER Verlag lizenzpflichtig Volltext, http://dx.doi.org/10.1007/978-3-642-31494-0 Resolving-System lizenzpflichtig Volltext, https://swbplus.bsz-bw.de/bsz367688328cov.jpg V:DE-576 X:springer image/jpeg 20130405112840 Cover, https://zbmath.org/?q=an:1248.94011 B:ZBM 2021-04-12 Verlag Zentralblatt MATH Inhaltstext, (DE-627)718778197, http://dx.doi.org/10.1007/978-3-642-31494-0 DE-14, DE-14 epn:3350038247 2012-07-04T16:23:46Z, http://dx.doi.org/10.1007/978-3-642-31494-0 DE-15, DE-15 epn:335003828X 2012-07-04T16:23:46Z, http://dx.doi.org/10.1007/978-3-642-31494-0 DE-Ch1, DE-Ch1 epn:3350038344 2012-07-04T16:23:46Z, http://dx.doi.org/10.1007/978-3-642-31494-0 Zum Online-Dokument DE-Zi4, DE-Zi4 epn:3350038425 2012-07-04T16:23:46Z, http://dx.doi.org/10.1007/978-3-642-31494-0 DE-520, DE-520 epn:3350038492 2012-07-04T16:23:46Z |
spellingShingle |
Rahaman, Hafizur, Progress in VLSI Design and Test: 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings, Lecture notes in computer science, 7373, This book constitutes the refereed proceedings of the 16th International Symposium on VSLI Design and Test, VDAT 2012, held in Shibpur, India, in July 2012. The 30 revised regular papers presented together with 10 short papers and 13 poster sessions were carefully selected from 135 submissions. The papers are organized in topical sections on VLSI design, design and modeling of digital circuits and systems, testing and verification, design for testability, testing memories and regular logic arrays, embedded systems: hardware/software co-design and verification, emerging technology: nanoscale computing and nanotechnology., Computer science, Computer Communication Networks, Computer software, Computer Science, Logic design, Software engineering, Data structures (Computer science), Computer networks ., Information theory., Algorithms., Computer programming., Konferenzschrift 2012 Hāora, Konferenzschrift, VLSI, Entwurfsautomation, System-on-Chip, Field programmable gate array, Testen, Verifikation |
swb_id_str |
367688328 |
title |
Progress in VLSI Design and Test: 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings |
title_auth |
Progress in VLSI Design and Test 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings |
title_full |
Progress in VLSI Design and Test 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings edited by Hafizur Rahaman, Sanatan Chattopadhyay, Santanu Chattopadhyay |
title_fullStr |
Progress in VLSI Design and Test 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings edited by Hafizur Rahaman, Sanatan Chattopadhyay, Santanu Chattopadhyay |
title_full_unstemmed |
Progress in VLSI Design and Test 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings edited by Hafizur Rahaman, Sanatan Chattopadhyay, Santanu Chattopadhyay |
title_in_hierarchy |
7373. Progress in VLSI Design and Test: 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings (2012) |
title_short |
Progress in VLSI Design and Test |
title_sort |
progress in vlsi design and test 16th international symposium vdat 2012 shibpur india july 1 4 2012 proceedings |
title_sub |
16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings |
title_unstemmed |
Progress in VLSI Design and Test: 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings |
topic |
Computer science, Computer Communication Networks, Computer software, Computer Science, Logic design, Software engineering, Data structures (Computer science), Computer networks ., Information theory., Algorithms., Computer programming., Konferenzschrift 2012 Hāora, Konferenzschrift, VLSI, Entwurfsautomation, System-on-Chip, Field programmable gate array, Testen, Verifikation |
topic_facet |
Computer science, Computer Communication Networks, Computer software, Computer Science, Logic design, Software engineering, Data structures (Computer science), Computer networks ., Information theory., Algorithms., Computer programming., Konferenzschrift, VLSI, Entwurfsautomation, System-on-Chip, Field programmable gate array, Testen, Verifikation |
url |
https://doi.org/10.1007/978-3-642-31494-0, http://dx.doi.org/10.1007/978-3-642-31494-0, https://swbplus.bsz-bw.de/bsz367688328cov.jpg, https://zbmath.org/?q=an:1248.94011 |