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Architecture of Computing Systems - ARCS 2010: 23rd International Conference, Hannover, Germany, February 22-25, 2010. Proceedings

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Personen und Körperschaften: Müller-Schloer, Christian (VerfasserIn), Karl, Wolfgang (Sonstige), Yehia, Sami (Sonstige)
Titel: Architecture of Computing Systems - ARCS 2010: 23rd International Conference, Hannover, Germany, February 22-25, 2010. Proceedings/ edited by Christian Müller-Schloer, Wolfgang Karl, Sami Yehia
Format: E-Book Konferenzbericht
Sprache: Englisch
veröffentlicht:
Berlin, Heidelberg Springer Berlin Heidelberg 2010
Gesamtaufnahme: SpringerLink
Lecture notes in computer science ; 5974
Schlagwörter:
Buchausg. u.d.T.: Architecture of computing systems - ARCS 2010, Berlin : Springer, 2010, XIII, 245 S.
Quelle: Verbunddaten SWB
Zugangsinformationen: Elektronischer Volltext - Campuslizenz
Details
Zusammenfassung: Keynote -- HyVM - Hybrid Virtual Machines - Efficient Use of Future Heterogeneous Chip Multiprocessors -- Processor Design -- How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT -- Complexity-Effective Rename Table Design for Rapid Speculation Recovery -- An Embedded GC Module with Support for Multiple Mutators and Weak References -- Embedded Systems -- A Hierarchical Distributed Control for Power and Performances Optimization of Embedded Systems -- Autonomic Workload Management for Multi-core Processor Systems -- Firefly Flashing Synchronization as Inspiration for Self-synchronization of Walking Robot Gait Patterns Using a Decentralized Robot Control Architecture -- Organic Computing and Self-organization -- The JoSchKa System: Organic Job Distribution in Heterogeneous and Unreliable Environments -- On Deadlocks and Fairness in Self-organizing Resource-Flow Systems -- Ad-Hoc Information Spread between Mobile Devices: A Case Study in Analytical Modeling of Controlled Self-organization in IT Systems -- Processor Design and Transactional Memory -- MLP-Aware Instruction Queue Resizing: The Key to Power-Efficient Performance -- Exploiting Inactive Rename Slots for Detecting Soft Errors -- Efficient Transaction Nesting in Hardware Transactional Memory -- Energy Management in Distributed Environments and Ad-Hoc Grids -- Decentralized Energy-Management to Control Smart-Home Architectures -- EnergySaving Cluster Roll: Power Saving System for Clusters -- Effect of the Degree of Neighborhood on Resource Discovery in Ad Hoc Grids -- Performance Modelling and Benchmarking -- Compiler-Directed Performance Model Construction for Parallel Programs -- A Method for Accurate High-Level Performance Evaluation of MPSoC Architectures Using Fine-Grained Generated Traces -- JetBench: An Open Source Real-time Multiprocessor Benchmark -- Accelerators and GPUs -- A Tightly Coupled Accelerator Infrastructure for Exact Arithmetics -- Optimizing Stencil Application on Multi-thread GPU Architecture Using Stream Programming Model.
Umfang: Online-Ressource (XIII, 247p. 105 illus, digital)
ISBN: 9783642119507
DOI: 10.1007/978-3-642-11950-7